This paper describes a novel approach to the modelling of the multirate switched capacitance (SC) filters using the nonlinear programming with a series of equality constraints. The procedure optimally distributes a limited switched capacitance area in the input branches of individual SC filter, by minimizing the overall capacitor spread while simultaneously achieving a minimum total capacitor area. The optimization algorithm for dimensioning the constraints allows an iterative simulation to carry out the synthesis task, implemented in a sequence two-step design procedure. Compared to the previous design example of SC decimator, the redesign shows that at least 9.2% reduction of the total capacitance area, while maintaining the same frequency responses.